Patch clamp is conventional equipment for intracellular single cell signaling. The probe size of patch clamp is micro-scale, and the cell membrane should be broken for the probe and cell interfacing. Therefore, patch clamp is not suitable for in vivo experiment and neuronal ARS-1620 concentration interfaces between neuron. Nanowire probes were fabricated based on the results. Si nanowires with optimum conditions (diameter of 60 nm, length
of 3 to 4 μm, density of 2.5 × 104 mm−2) were grown vertically on a highly resistive intrinsic Si substrate (shown in Figures 1a and 2a). These Si nanowires are single crystalline, and the growth direction of nanowire is the (111) axes that are perpendicular to the (111) planes of face-centered cubic structure (See Additional file 1: Figure S1 of supplementary data). A working field of 120 μm × 120 μm was defined to make an alignment mark on the substrate for photolithography and sputter PX-478 mouse deposition. A photoresistor (PR) was then coated on the substrate with polymethylglutarimide (PMGI) and AZ 5214E by spin-coating and baking, respectively. The substrate was then sonicated in distilled water to remove dispensable nanowires, and a vertical Si nanowire was selected with reference to a pre-defined coordinate system, using an FESEM. An initial SiO2 dielectric
layer approximately 700-nm thick was deposited by high-density plasma chemical vapor deposition (HDP CVD), and the nanowires were exposed by a wet etching process using an ammonium fluoride mixture (shown in Figure 2b). This SiO2 dielectric layer prevents the flow of leakage current from the nanowire probes to the substrate, which appears to be Captisol crucial to achieve very tiny signals from each probe.
Figure 2 SEM images and a schematic bird’s eye view of the build-up procedure of the vertical nanowire probe electrode. (a,b,c,d) SEM images of the build-up procedure of the vertical nanowire probe electrode ((a) selected vertical nanowire, (b) bottom passivation layer preventing electrical leakage, Metalloexopeptidase (c) Pt deposition for electrode formation, (d) top passivation layer for intracellular recording, scale bar is 2 μm]. (e,f,g,h) A schematic bird’s eye view of the build-up procedure of the vertical nanowire probe electrode (inset: cross-sectional view). Cr/Pt electrodes, which are connected with an external circuit, were then defined using photolithography and a sputtering process. A Pt layer that acts as an active electrode for signaling was subsequently defined for the individual nanowires by e-beam lithography and a sputtering process (shown in Figure 2c). This step was necessary because Si nanowires have a native SiO2 layer with thickness of 2 nm. This layer would build a very high potential barrier for signal transfer between the cell and nanowire probe.